Electronics Engineering Question:

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Explain why the input impedance of OP-Amp is so high?

Electronics Engineering Interview Question
Electronics Engineering Interview Question

Answer:

In OPAMP, we have 4 stages, 1st stage, i.e the input stage is a dual i/p balanced o/p opamp whose i/p resistance is v high. and if we use FET in case of BJT for 1st stage diffamp, then i/p resistance will be v high in M ohms.

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What is cache coherency and snoopingIf a clock with time period T is used with n stage shift register,
the output of the final stage will be delayed by

1. nT seconds
2. (n-1)T seconds
3. n/T seconds
4. (2n-1)T seconds