Computer Architecture And Design Interview Questions And Answers

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Elevate your Computer Architecture And Design interview readiness with our detailed compilation of 42 questions. Each question is designed to test and expand your Computer Architecture And Design expertise. Suitable for all experience levels, these questions will help you prepare thoroughly. Download the free PDF now to get all 42 questions and ensure you're well-prepared for your Computer Architecture And Design interview. This resource is perfect for in-depth preparation and boosting your confidence.

42 Computer Architecture And Design Questions and Answers:

Computer Architecture And Design Job Interview Questions Table of Contents:

Computer Architecture And Design Job Interview Questions and Answers
Computer Architecture And Design Job Interview Questions and Answers

1 :: What is Virtual Memory in Computer?

Virtual memeory is that when the available RAM memory is not sufficient for the system to run the current applications it will take some memory from hard disk.This memory is termed as Virtual memory
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2 :: Explain How many types of memory in computer architecture?

computer have different type of memory like primary memory , Auxiliary memory , buffer memory , Cache memory , virtual memory ,
the work of all memory heterogeneously primary memory is directly communicate with the CPU . Auxiliary memory are used for storing the data for long time . Buffer memory are mainly used for storing the intermediate data between the travel . cache memory are used for storing the those data that currently required at process time for increase the speed of the data . virtual memory are put in between the two memory for increase the speed of data or instruction it means it put between HDD and RAM .
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3 :: Explain What are the different hazards? How do we avoid them?

There are situations, called hazards, that prevent the next instruction in the instruction stream from executing during its designated clock cycle. Hazards reduce the performance from the ideal speedup gained by pipelining. There are three classes of Hazards:

1. Structural Hazards: It arise from resource conflicts when the hardware cannot support all possible combinations of instructions simultaniously in ovelapped execution.

2. Data Hazards: It arise when an instruction depends on the results of previous instruction in a way that is exposed by the ovelapping of instructions in the pipeline.

3. Control Hazards: It arise from the pipelining of branches and other instructions that change the PC.
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4 :: Instead of just 5-8 pipe stages why not have, say, a pipeline with 50 pipe stages?

The latency of the architecture increases with the pipeline stages. Penalty due to the flushing of the pipeline for instance will also increase Cycles Per Instruction of the CPU architecture
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5 :: Explain The CPU is busy but you want to stop and do some other task. How do you do it?

Arise a non maskable interrupt.
Then give jump instruction to required subroutine.
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6 :: Convert 65(Hex) to the Binary?

65 to decimal
65/16=4
remainder=1

==41 decimal
decimal to binary
101001
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7 :: How do we handle precise exceptions or interrupts?

Like java have a feature for handling exception handling "prime catch".the exception like divide by zero,out of bound.
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8 :: Explain the difference between interrupt service routine and subroutine?

Subroutine are the part of executing processes(like any process can call a subroutine for achieve task),while the interrupt subroutine never be the part.interrupt subroutine are subroutine that are external to a process.
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9 :: Can you explain what are the basic components in a Microprocessor?

1)address lines to refer to the address of a block

2)data lines for data transfer

3)IC chips 4 processing data
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10 :: What is Static and Register variables?

Please share your answer we have still looking for answer or this question
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11 :: Explain MESI?

The MESI protocol is also known as Illinois protocol due to its development at the University of Illinois at Urbana-Champaign and MESI is a widely used cache coherency and memory coherence protocol.
MESI is the most common protocol which supports write-back cache. Its use in personal computers became widespread with the introduction of Intel's Pentium processor to "support the more efficient write-back cache in addition to the write-through cache previously used by the Intel 486 processor"
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12 :: Explain ACBF(Hex) divided by 16?

1. Convert to Decimal: (Ax16pow3)+(Cx16pow2)+(Bx16pow1)+(Fx16pow0)
2. Do not try to compute the whole result as any ways we have to divide the number by 16 which results in
(Ax16pow2)+(Cx16pow1)+(Bx16pow0)+(Fx16pow-1)
3. Now get the result as 2928.93 in decimal.
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13 :: Explain a Snooping cache?

Snooping is the process where the individual caches monitor address lines for accesses to memory locations that they have cached. When a write operation is observed to a location that a cache has a copy of, the cache controller invalidates its own copy of the snooped memory location.

Snarfing is where a cache controller watches both address and data in an attempt to update its own copy of a memory location when a second master modifies a location in main memory
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14 :: Explain What are five stages in a DLX pipeline?

The instruction sets can be differentiated by

* Operand storage in the CPU
* Number of explicit operands per instruction
* Operand location
* Operations
* Type and size of operands
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15 :: What is External Interrupts?

These types of interrupts generally come from external input / output devices which are connected externally to the processor. They are generally independent and oblivious of any programming that is currently running on the processor.
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16 :: What is Internal Interrupts?

They are also known as traps and their causes could be due to some illegal operation or the erroneous use of data. Instead of being triggered by an external event they are usually triggered due to any exception that has been caused by the program itself. Some of the causes of these types of interrupts can be due to attempting a division by zero or an invalid opcode etc.
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17 :: What is Software interrupts?

These types if interrupts can occur only during the execution of an instruction. They can be used by a programmer to cause interrupts if need be. The primary purpose of such interrupts is to switch from user mode to supervisor mode.
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18 :: What is Vertical microcode?

Vertical microcode can be considered to be a segment of code or operators that have been clubbed together into fields. In this field every micro operation is given a unique value.
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19 :: Explain about designing strategy of a control unit coded on vertical code?

★ A no operation NOP can be included in each field if necessary.
★ The remaining micro operations can be distributed among the other operation field bits.
★ Also micro operations that modify the same registers could be grouped together in the same field.
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20 :: Can you explain the two hardware methods to establish priority?

Two different ways of establishing hardware priority are Daisy Chaining and parallel priority.
★ Daisy chaining is a form of a hardware implementation of the polling procedure.
★ Parallel priority is quicker of the two and uses a priority encoder to establish priorities.
★ In parallel priority interrupt a register is used for which the bits are separated by the interrupt signals from every device.
★ The parallel priority interrupt may also contain a mask register which is primarily used to control the status of every request regarding interrupts.
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21 :: What are the requirement of page-table?

For any computer generally the memory space is lesser as compared to the address space this implies that the main memory is lesser as compared to the secondary memory.
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22 :: Described the different ways in which the table can be organized?

★ On the basis of the demands of the CPU data is transferred between the two memories.
★ Due to this a mapping technique is required which can be implemented using page-table.
★ The page table can be organized in two ways namely in the R/W memory and by using associative logic.
★ In case of R/W memory the speed of execution of programs is slow as it requires two main memory references to read data. It is also known as memory page table.
★ In case of associative logic it is considered to be more effective because it can be built with simply keeping mind to have equal no. of blocks in the memory as many as there are words.
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23 :: What are Flip-flops?

★ Flip flops are also known as bi-stable multi-vibrators. They are able to store one bit of data.
★ Flip flops are able to be in two stable states namely one and zero. They can be in either states and in order to change their states they have to be driven by a trigger.
★ Certain flip flops are edge triggered meaning they only respond to voltage changes from one level to another. They can be either positive edged triggering or negative edged triggering.
★ Flip flops turn on in a random manner that is they can be in either of the states when they are turned on. In order to have a uniform state when they are powered on a CLEAR signal has to be sent to the flip flops. They can also be made to turn on in a particular state by applying PRESET.
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24 :: Explain partitioning in reference to operating systems?

Partitioning involves the user to partition their hard drives and then they can implement / install multiple operating systems on them. The user requires a boot manager to switch between different operating systems.
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25 :: Give advantages and disadvantages of partitioning in reference to operating systems?

★ Partitioning allows each operating system to work optimally.
★ Each os has the complete access to the hardware of the system on which it is being executed.
★ Also depending on the file system used the user is free to resize his partition according to his needs.
★ But manual partition is not a simple task and requires patience.
★ The system needs to be restarted in case the user wants to switch operating systems.
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