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What is VHDL and/or Verilog?

vhdl is very high speep integrated chips hardware
descripted language and verilog is to verify logic

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You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?	What are the total number of lines written by you in C/C++? What compiler was used?