Hardware Design Question:
How to design a divide-by-3 sequential circuit with 50% duty circle?
Answer:
take a counter with 3 f/f's that is to say with 6 states(2*3) now double the i/p clock frequency to the counter the o/p of the 3rd f/f is divide by 6 of the i/p with 50% duty cycle so effectively u got divide by 3 freq with 50% duty cycle.
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