Hardware Design Question:

Draw a Transmission Gate-based D-Latch?

Answer:

The Transmission-Gate's input is connected to the D_LATCH data input (D), the control input to the Transmission-Gate is connected to the D_LATCH enable input (EN) and the Transmission-Gate output is the D_LATCH output (Q)

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Explain what is Transmission Gate-based D-Latch?	Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal?